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| WIZnet Inc. IIM7010A 1. Introduction IIM7010A is the network module that includes W3100A (TCP/IP hardwired chip), Ethernet PHY (RTL8201BL), MAG-JACK (RJ45 with X'FMR) with other glue logics. It can be used as a component and no effort is required to interface W3100A and PHY chip. The IIM7010A is an ideal option for users who want to develop their Internet enabling systems rapidly. IIM7010A consists of W3100A, Ethernet PHY and MAG-JACK. TCP/IP, MAC protocol layer: W3100A Physical layer: Ethernet PHY Connector: MAG-JACK 1.1. Features Supports 10/100 Base TX Supports half/full duplex operation Supports auto-negotiation IEEE 802.3/802.3u Complaints Operates 3.3V with 5V I/O signal tolerance Supports network status indicator LEDs Includes Hardware Internet protocols: TCP, IP Ver.4, UDP, ICMP, ARP Includes Hardware Ethernet protocols: DLC, MAC Supports 4 independent connections simultaneously Supports Intel/Motorola MCU bus Interface Supports I2C Interface Supports Direct/Indirect mode bus access Supports clocked mode, non-clocked mode, external clocked mode Supports Socket API for easy application programming Interfaces with Two 2.0mm pitch 2 * 12 header pin Has compatibility with IIM7010 - http://www.wiznet.co.kr - http://www.iInChip.com - - 1Internet Inside Chip WIZnet Inc. 1.2. Block Diagram 2. Pin Assignments & descriptions I : Input I/O : Bi-directional Input and output O : Output P : Power 2.1. Power & Ground Symbol Type VCC GND P P JP1 JP1 JP2 JP2 : : : : Pin No. JP1 : 1 , 8, 24, 7, 14, JP2 : 24 JP1 JP2 JP2 JP2 : : : : 13, 1 13 23 Ground Description Power : 3.3 V power supply - http://www.wiznet.co.kr - http://www.iInChip.com - - 2Internet Inside Chip WIZnet Inc. 2.2. MCU Interfaces Symbol Type A14~A8 I JP1 JP1 JP1 JP1 : : : : Pin No. 7, JP1 : 10 9, JP1 : 12 11, JP1 : 14 15 Description Address / Device Address :In Bus access mode is used as Address[148] pin In I2C interface mode is used as device address[6-0] pin Address : In Bus access mode is used as Address[7-0] pin In I2C interface mode, these pins are not used, so leave them NC or ground them. Data : 8 bit-wide data bus A7~A0 I JP1 : 16 ~ JP1 : 23 D7~D0 I/O JP2 JP2 JP2 JP2 : : : : 21, 19, 17, 15, JP2 JP2 JP2 JP2 : : : : 22 20 18 16 /CS /RD /WR /INT I I I O JP1 : 5 JP1 : 4 JP1 : 3 JP1 : 2 Module Select : Active low. /CS of W3100A Read Enable : Active low. /RD of W3100A Write Enable : Active low /WR of W3100A Interrupt : Active low After reception or transmission it indicates that the W3100A requires MCU attention. By writing values to the Interrupt Status Register of W3100A the interrupt will be cleared. All interrupts can be masked by writing values to the IMR of W3100A(Interrupt Mask Register). For more details refer to the W3100A Datasheet - http://www.wiznet.co.kr - http://www.iInChip.com - - 3Internet Inside Chip WIZnet Inc. I_SCL I JP2 : 25 SCL : Used as clock by I2C interface mode. Internally pull-down SDA : Used as data by I2C interface mode. Internally pull-down I_SDA I/O JP2 : 26 2.3. Network status & LEDs You can observe the network status using MAC-JACK LEDs. LED interface can be extended to the LED of the main board. Symbol L_COL Type O Pin No. JP2 : 6 Description Collision LED collisions occur. : Active low when L_100ACT O JP2 : 8 Link 100/ACT LED : Active low when linked by 100 Base TX, and blinking when transmitting or receiving data. Link 10/ACT LED : Active low when linked by 10 Base T, and blinking when transmitting or receiving data. Full Duplex LED : Active low when in full duplex operation. Active high when in half duplex operation. Link LED : Active low when linked L_10ACT O JP2 : 10 L_DUPX L_LINK O O JP2 : 11 JP2 : 12 - http://www.wiznet.co.kr - http://www.iInChip.com - - 4Internet Inside Chip WIZnet Inc. 2.4. Miscellaneous Signals Symbol RESET Type I Pin No. JP1 : 6 Description Reset : Active high Initializes or Reinitializes the W3100A. Asserting this pin will force a reset process to occur, which will result in all internal registers reinitializing to their default and all strapping options are reinitialized. For complete reset function, this pin must be asserted low for at least 10us. Refer to W3100A datasheet for further detail regarding reset. Reset : Active low Reset RTL8201BL chip. For complete reset function this pin must be asserted low for at least 10ms. Mode Select : These pins select MCU interface and operating mode. Since each pin is pull-down internally, clocked mode (the default mode) is selected when these pins are not connected. M1 M0 0 0 1 1 0 1 0 1 Mode Clocked External clocked Non-clocked I2C interface /RESET I JP2 : 2 MODE1~0 I JP1 : 26 , JP1 : 25 Refer to W3100A datasheet for further detail regarding mode select - http://www.wiznet.co.kr - http://www.iInChip.com - - 5Internet Inside Chip WIZnet Inc. EXT_CLK I JP1 : 28 External clock : supplementary clock used for external clocked mode. In external clocked mode, W3100A uses this clock to interface with MCU. Refer to W3100A datasheet for further detail regarding external clock. NC - JP1 : 27, JP2 : 3 Not Connect JP2 : 5, JP2 : 9 JP2 : 27, JP2 : 28 3. Timing Diagrams IIM7010A provides following interfaces of W3100A -. Direct/Indirect mode bus access -. I2C Interface -. Clocked mode, Non-Clocked mode, External clocked mode Refer to W3100A datasheet for timing of IIM7010A - http://www.wiznet.co.kr - http://www.iInChip.com - - 6Internet Inside Chip WIZnet Inc. 4. Dimensions A B JP1 C D E JP2 I J F G H Symbols A B C D E F G H I J Dimensions (mm) 48.0 4.0 25.0 22.4 18.4 1.0 2.0 2.0 16.0 13.4 - http://www.wiznet.co.kr - http://www.iInChip.com - - 7Internet Inside Chip WIZnet Inc. 5. Design guide for IIM7010 user -. IIM7010 v IIM7010A The IIM7010 and the IIM7010A are 100% compatible. In the IIM7010A 8 Pins are added which brings to the enlargement in 4.4mm. If there are no problems in the system and if the jut out part in the MAG-JACK is 4.3mm (in the IIM7010 it is 6.0mm) and brings no problems to the housing, the IIM7010A could be applied in the IIM7010 used system without any changes. -. Additional specifications and changes in the IIM7010A 1. PHY changes: Use the RTL8201BL from RealTek 2. MAG-JACK changes: RJ45 Connector with integrated with X'FMR and LEDs (P/N: LU1T516-43, www.bothhand.com) 3. Left LED: Green color, Used in Link Indicator LED 4. Right LED: Yellow color, Used in Activity Indicator LED 5. Changes in Pin specifications due to added functions (refer to the Pin Description below) 6. Supports 4 more interface methods between MCU and the W3100A such as: Clocked Mode, Non-Clocked Mode, External Clocked Mode and I2C Interface (reference: The IIM7010 provides only Clocked Mode) - http://www.wiznet.co.kr - http://www.iInChip.com - - 8Internet Inside Chip WIZnet Inc. -. Pin Comparison 8 pins are added to increase functions PN PIN # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 JP1 VCC(3.3V) /INT /WR /RD /CS RESET A14 GND A12 A13 A10 A11 GND A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 GND IIM7010 JP2 GND /RESET NC GND NC NC GND NC NC NC NC NC GND GND D1 D0 D3 D2 D5 D4 D7 D6 GND VCC(3.3V) JP1 VCC(3.3V) /INT /WR /RD /CS RESET A14 GND A12 A13 A10 A11 GND A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 GND MODE0 MODE1 MODE2 EXT_CLK IIM7010A JP2 GND /RESET NC GND NC L_COL GND L_100ACT NC L_10ACT L_DUPX L_LINK GND GND D1 D0 D3 D2 D5 D4 D7 D6 GND VCC(3.3V) I_SCL I_SDA NC NC - http://www.wiznet.co.kr - http://www.iInChip.com - - 9Internet Inside Chip |
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